Nanotechnol.: Low-Voltage Operation of All-Printed Flexible Carbon Nanotube Thin-Film Transistors Based on a Thin Dielectric Layer
Product Introduction
Equipment Parameters
I. Abstract of the Paper’s Core Research
- Ultra-thin printing media enable low-voltage operation.
XDI‑DCS (a polyvinyl alcohol/methylsilsesquioxane composite ink) is diluted with butanol; after optimizing the formulation, the printed layer thickness can be as low as approximately 300 nm, yielding a pinhole‑free insulating film. The transistor gate voltage required for complete switching is only ±6 V, significantly lower than that of conventional all‑printed CNT‑TFTs (±30–40 V).
- High-Performance Carbon Nanotube Active Network
Multilayer alternating aerosol printing of single-walled semiconducting carbon nanotubes, combined with oxygen plasma–based substrate activation, suppresses nanotube bundle aggregation and significantly enhances channel uniformity; the devices exhibit an average field-effect mobility of 4.9 cm² V⁻¹ s⁻¹, an on/off current ratio exceeding 10⁵, and hysteresis of only 0.6 V.
- End-to-end integrated manufacturing on a single device
The source and drain silver electrodes, the CNT channel, the gate dielectric, and the top-gate silver electrode are all deposited using a single AJP system, eliminating the need to switch between multiple printing platforms, thereby streamlining the production line and reducing equipment costs.
- Standardization and Optimization of Medium-Grade Inks
The optimal dilution ratio of XDI‑DCS to butanol was established as 1:2.5, matching an ultrasonic atomization flow rate of 34 CCM. This significantly improved the yield of qualified insulating films, with leakage currents well below 0.1 nA, thereby preventing gate‑source short circuits.
- Wide substrate compatibility
Stable devices have been realized on both polyimide (Kapton) and liquid crystal polymer (LCP) flexible substrates, with only minimal degradation in electrical performance under bending conditions, making them well suited for a wide range of flexible electronic applications.
II. Working Principle of Aerosol Jet Printing for Electronic Components & Unique Advantages
(1) Complete AJP Deposition Process
- Ultrasonic atomization generates a uniform nano‑ink mist. : Different functional inks (silver paste, CNTs, and XDI‑DCS medium) are separately fed into the atomization chamber, where high‑frequency ultrasonic cavitation breaks them down into uniform micron‑scale droplets.
- Coaxial sheath gas isolation prevents clogging: A ring‑shaped protective gas flow seals off the ink from the printhead’s inner walls, ensuring no drying or blockage even during extended printing sessions.
- Non-contact, precision deposition: the nozzle maintains an adjustable gap from the substrate, and CAD‑based custom micrometer‑scale electrode/channel patterns can be defined.
- Layer-by-layer additive printing: The layers are sequentially deposited in the following order—substrate activation, source and drain silver electrodes, carbon nanotube channel, ultrathin dielectric, and top-gate silver—with each layer cured at low temperature, ensuring no damage to the flexible substrate throughout the process.
(II) Five Core Process Advantages (Compared with Inkjet, Gravure, and ALD)
- Single-device, full-layer integrated printing
Other printing approaches typically require at least two to three types of equipment, whereas this study demonstrates that a single AJP system can fabricate all functional layers—electrodes, semiconductors, and insulating dielectrics—significantly reducing both the footprint of the production line and procurement costs.
- Ultra-wide ink viscosity compatibility
It is compatible with high-viscosity silver conductive inks, low-concentration carbon nanotube dispersions, and dilute polymer‑based solutions, allowing material switching without replacing the atomizing nozzle.
- Non-contact, non-destructive flexible thin film
The nozzle does not come into contact with the substrate, so thin Kapton and LCP films are protected from compression‑induced wrinkling and damage, and uniform coating can be achieved even on curved, flexible substrates.
- Micron-scale, high-precision patterns—no photolithography mask required.
The minimum channel length can reach 20 μm, and digital direct writing eliminates the photolithography and etching steps, enabling rapid prototyping and iterative design for small‑batch circuits.
- Low-temperature process compatible with plastic substrates
The entire printing and curing process is conducted at temperatures ≤150°C, ensuring no melting or degradation of the flexible polymer film and compatibility with most low-cost flexible substrates.
III. Key Technological Innovations of This Study
Innovation 1: Ultra-thin, pinhole-free printed polymer dielectric with a thickness of 300 nm
Innovation 2: Oxygen plasma combined with multi-layer printing addresses the challenge of carbon nanotube agglomeration.
Innovation 3: XDI-DCS composite dielectric replacing the barium titanate–ion system
Innovative 4-no-ALD vacuum process, enabling truly all-solution fabrication.
Innovation 5: Standardized formulation of medium-viscosity inks and atomization process
IV. Existing Process Challenges and Corresponding Solutions
Challenge 1: Unoptimized dielectric inks are prone to pinholing, leading to gate short circuits.
Problem: High-concentration XDI-D ink exhibits poor spreading, resulting in a granular film; excessive dilution leads to incomplete film formation and numerous pinholes, causing electrical leakage.
✅ Breakthrough: By diluting with n-butanol at a 1:2.5 ratio and using an ultrasonic atomization flow rate of 30–38 CCM, a continuous, pinhole-free, ultra-thin dielectric layer is achieved, with leakage current maintained below 0.1 nA.
Challenge 2: Carbon nanotube inks tend to agglomerate during direct printing, leading to a sharp drop in device mobility.
Problem: The flexible substrate exhibits strong hydrophobicity, leading to agglomeration of carbon nanotubes during a single printing pass and resulting in uneven conductive pathways.
✅ Breakthrough: Oxygen plasma surface activation 5 minutes prior to printing; a multilayer cyclic printing process combined with toluene washing to remove excess dispersant, enabling the formation of a uniform, continuous CNT network.
Challenge 3: The thick dielectric layer exhibits poor gate control, requiring a high‑voltage drive of 30 V or higher.
Problem: When the dielectric thickness exceeds 1 μm, the gate capacitance becomes extremely low, making it difficult to turn off the transistor.
✅ Breakthrough: Precise control of atomization flow reduces the deposition thickness per layer, enabling the fabrication of 300-nm‑thick ultra‑thin dielectrics through multilayer stacking, while increasing gate capacitance and lowering the drive voltage to ±6 V.
Challenge 4: When switching between multiple inks, nozzle residue causes contamination, leading to numerous film defects.
Issue: Cross‑printing of silver paste, carbon nanotubes, and dielectric inks can lead to cross‑contamination, resulting in leakage defects.
✅ Breakthrough: Before replacing the ink, the printhead tubing is subjected to prolonged ultrasonic cleaning, followed by stepwise rinsing with toluene and IPA, effectively preventing residual contaminants from entering the film.
Challenge 5: Achieving both insulation performance and low-voltage characteristics with a single-layer dielectric thickness is difficult.
Problem: Films thinner than 300 nm are extremely prone to breakdown and short circuits, while those thicker than 600 nm require a higher drive voltage.
✅ Breakthrough: A fixed optimal thickness range of 330–410 nm, matched to a 34 CCM atomization flow rate, balances dielectric withstand voltage and low‑voltage gate control performance.
V. Future Diversified Industrial Application Scenarios
1. Large-area flexible electronic skin
2. Flexible Display Backplane Drive Circuit
3. Passive RFID Wireless Sensor Tag
4. Flexible Pressure/Gas Sensors
5. Curved Surface Irregular-Shaped Smart Wearable Circuit
Figure 1. Schematic illustration of the fabrication process for fully printed carbon nanotube transistor field-effect transistors (CNT‑TFTs) on a flexible substrate using AJP. (a) A carefully prepared flexible substrate (polyimide or liquid crystal polymer), subjected to a 3–5‑minute oxygen plasma treatment prior to printing. (b) Silver electrodes are printed to form the source and drain contacts. (c) Carbon nanotubes undergo a 1‑minute oxygen plasma treatment before printing to enhance wettability. (d) A carbon nanotube network is constructed via a layer-by-layer printing approach. (e) The dielectric layer/xdi‑dcs layer is printed. (f) The silver electrodes receive a 2–3‑minute oxygen plasma treatment prior to printing. (g) Silver electrodes serve as the top gate electrode. Fully printed CNT‑TFTs are fabricated according to the sequence described above. Note: Silver electrodes are cured at 150°C for 15–25 minutes; the dielectric/xdi‑dcs layer is cured at 140°C for 20 minutes.
Figure 2. Structural features and morphology of printed carbon nanotube field-effect transistors (CNT‑TFTs). (a) A CNT‑TFT fully printed on a Kapton substrate using an xdie‑dcs dielectric layer; under the microscope, this xdie‑dcs layer appears as a transparent thin film, with the carbon nanotube network (outlined in red dashed lines) virtually invisible within the channel. (b) Scanning electron microscopy (SEM) images reveal the silver electrodes, the carbon nanotube network, and the overall morphology of the CNT‑TFT. (c) A CNT‑TFT printed on an LCP substrate using an ALD dielectric layer.
Figure 3. Effect of oxygen plasma treatment on the xdx‑dcs thin‑film surface prior to carbon nanotube network printing (a)–(f) and silver deposition (g)–(h). Without plasma treatment, carbon nanotubes tend to agglomerate (a)–(b), and the silver film exhibits an uneven surface riddled with numerous pinholes (g). Following plasma treatment, layer-by-layer deposition enables effective control of the carbon nanotube network density (c)–(f). The scale bar in (a)–(f) is 2 μm. Images (i) and (j) are scanning electron micrographs from [31] and [36], respectively, showing a much higher density than that observed in (c)–(d). Optimizing the printing process for a conductive single‑layer carbon nanotube network—characterized by extremely low density—can substantially enhance the on/off ratio of fully printed carbon nanotube field‑effect transistors.
Figure 4. Influence of the printed xdie-dcs layer on the performance of all-printed carbon nanotube transistors (CNT‑TFTs). (a) Comparison of transfer characteristics for three all-printed CNT‑TFTs with different dielectric layer thicknesses; (b) Dependence of the threshold voltage (Vth) in all-printed CNT‑TFTs on the thickness of the printed xdie-dcs film.
Table 1. Comparison of reported performance and fabrication details for printed carbon nanotube transistors (CNT‑TFTs) in the literature. Overall, devices based on atomic layer deposition (ALD) exhibit superior performance and stability but come at a higher cost, whereas ionogel‑based devices can operate at lower voltages but suffer from structural fragility. In this study, we employed a single‑step printing approach and used XDI‑DCS as the dielectric layer, successfully achieving excellent performance in fully printed flexible devices (the devices reported in Ref. [36] did not utilize single‑step printing, and most of their data were obtained from devices fabricated on rigid substrates). References marked with an asterisk ([33], [42], and [36]) all indicate that these back‑gate devices incorporate encapsulation layers.
Figure 5. (a) Schematic illustration of the structure used to test the insulating properties of printed xdie‑dcs films (light green layer), showing both the layered architecture and a cross-sectional view. (b) Morphology of printed xdie‑dcs films at different dilution ratios σ (1:1, 1:2.5, and 1:4) and UA flow rates (30 and 35 CCM). Films prepared at higher dilution ratios fail to meet device‑application requirements, as particulate matter during xdie‑dcs printing leads to numerous pinholes; this indicates that even at σ = 1:1, the dielectric ink concentration remains too high. The intermediate series depicts well‑printed xdie‑dcs films: at σ = 1:2.5, no pinholes are observed, and the thickness of the printed dielectric layer can be tuned by adjusting the UA flow rate. In contrast, films prepared at lower dilution ratios exhibit multiple large pinholes due to over‑printing (as indicated by the red dashed region in the left panel) and may even damage the substrate (right panel), suggesting that at σ = 1:4, the dielectric ink concentration is still insufficient. All scale bars represent 300 μm.
Figure 6. Optimization results for printed xDi‑DCS thin films. (a) Yield—defined as the number of samples exhibiting good insulating properties and leakage currents well below the corresponding transistor off‑state current (approximately 0.1 nA)—as a function of different σ–UA flow rate combinations; (b) Variation of xDi‑DCS film thickness with UA flow rate at σ = 1:2.5, which corresponds to the optimal σ value shown in (a). In both panels (a) and (b), the black dashed box highlights the optimal UA flow rate range of 30–38 CCM, associated with the best σ value.
Figure 7. I–V characteristics of CNT‑TFTs. Transfer curve (a) and output curve (b) of a CNT‑TFT fabricated by ALD, with approximately 80 nm of aluminum oxide, a gate width W = 500 μm, a channel length L = 100 μm, and a single deposition of the CNT network; transfer curve (c) and output curve (d) of a fully printed CNT‑TFT employing a printed dielectric layer only 0.3 μm thick, with a gate width W = 500 μm, a channel length L = 150 μm, and three successive depositions of the CNT network.
Download Materials
YUNS-123456