“Adv. Mater.”: Aerosol-Jet-Printed Sub-2-V Complementary Circuits Based on p-Type and n-Type Electrolyte-Gated Transistors
Product Introduction
Equipment Parameters
I. Core Research Summary
- Differential Transport Mechanisms in Bipolar Devices
P3HT p‑type transistor: Ion penetration into the thin film induces three-dimensional electrochemical doping, yielding a hole mobility as high as 2.4 cm²/V·s and a gate capacitance up to 206 μF/cm².
ZnO n‑channel device: Ions form a two-dimensional electric double layer only at the interface, with electron mobility of 1.9 cm²/V·s; the two devices, when combined, exhibit perfectly complementary switching characteristics.
- High-performance complementary inverter
Supply voltage ≤ 2 V, voltage gain up to 18, rail-to-rail full‑range output, and static power consumption below 10 nW—significantly lower than that of unipolar ambipolar carbon nanotube circuits.
- High-speed five-stage ring oscillator
Under a 2 V supply, the oscillation frequency is 2.2 kHz, with a single-stage propagation delay of 43 μs, representing nearly a tenfold increase in speed compared to conventional photolithographic circuit fabrication.
- Ultra-long-term dynamic stability
After 22 hours of continuous switching at 1 kHz, the output voltage has degraded by only 13%; the oscillator maintains stable operation for 1 hour, with only a slight frequency drift, demonstrating excellent bias stability.
- Aerosol-compatible multi-system inks
Four types of inks—organic polymers, metal oxides, ionic gels, and conductive polymers—can be used for layer-by-layer direct writing on a single device, with print line widths controllable between 30 and 50 μm, enabling maskless digital fabrication.
II. Working Principle of Aerosol Spraying & Unique Process Advantages
(1) Complete Layer-by-Layer Printing Process
- The substrate is a silicon wafer with pre-patterned Au source and drain electrodes fabricated by photolithography, maintained at a constant temperature of 60°C on the stage.
- First, an aerosol is used to deposit a ZnO n‑channel layer, followed by 300°C air annealing.
- Zone‑by‑zone printing of P3HT p‑type semiconductor thin films;
- All‑area aerosol printing using a PS‑PMMA‑based ionic gel gate dielectric;
- Print the PEDOT:PSS top gate to complete the complementary transistor array.
(II) Five Core Process Advantages
- Universal compatibility across multiple ink categories
A single atomization system is compatible with organic polymers, metal oxide particles, ionic liquid gels, and conductive polymers, eliminating the need to replace printing equipment and enabling the fabrication of p‑n bipolar devices on a single production line.
- Sheath gas focuses high-precision patterns, with a minimum line width of 30 μm.
A coaxial sheath‑gas flow confines the aerosol jet, eliminating ink‑jet nozzle clogging and enabling precise microscale channel patterning to meet the miniaturization requirements of high‑speed logic circuits.
- Non-contact, gentle deposition that protects sensitive organic thin films.
The droplets gently land, preventing erosion of the printed semiconductor layer, thereby avoiding delamination and morphological degradation of the P3HT film and ensuring high charge carrier mobility.
- Large-area, uniform film formation of ionic gels
Unconstrained by film‑thickness precision, ionogel capacitors are independent of thickness, significantly reducing the complexity of print‑process control and making them well suited for large‑area logic arrays.
- The air environment can be continuously printed in batches.
The entire deposition process requires no glovebox inert‑atmosphere protection, simplifying the investment in sealed production‑line equipment and enabling upgrades to roll‑to‑roll flexible substrates.
III. Key Technological Innovations of This Study
Innovation 1: Integrated aerosol-based fabrication of p‑ and n‑type differentiated electrolyte transistors
Innovation 2: Ion-gel high-capacitance gate dielectrics break through the low-voltage bottleneck.
Innovation 3: Distinguishes between two-dimensional and three-dimensional ion regulation, balancing gain and speed.
Innovation 4: Precise aerosol‑based zone printing, with a simultaneously integrated complementary circuit.
Innovation: 5 Low-Power, Long-Term, Dynamically Stable Printing Logic
IV. Existing Process Challenges and Corresponding Solutions
Challenge 1: Single-material semiconductors are unipolar, making it impossible to construct low-power CMOS circuits.
Challenge 2: Conventional insulated-gate devices require high drive voltages, which are incompatible with miniature power supplies.
Challenge 3: The parasitic RC delay in the printed circuit is large, resulting in slow switching speed.
Challenge 4: P3HT films are easily damaged by subsequent ink washing.
Challenge 5: ZnO requires high-temperature annealing at 300°C, which limits the use of flexible substrates.
V. Future Diversified Industrial Application Scenarios
1. Paper-based / Flexible IoT Passive Tag
2. Wearable Physiological Sensor Readout Circuit
3. Miniature Flexible Display Driver Backplane
4. Intelligent Electronic Control Unit for Textiles
5. Aerospace / Low-Power Monitoring Devices for Outdoor Use
Figure 1. (a) Three-dimensional schematic of a complementary inverter fabricated on a SiO₂/Si substrate, employing p‑channel (P3HT) and n‑channel (zinc oxide) electrochromic materials. (b) Photograph of the electronic functional inks used in this study. (c) Photographs of printed patterns of P3HT, zinc oxide, ionogel, and PEDOT:PSS. All patterns were fabricated via AJP printing. (d–f) Magnified images of a single EGT, the complementary inverter, and a five-stage ring oscillator.
Figure 2. (a) Quasi‑static transfer characteristics and (b) output characteristics of a p‑type EGT based on P3HT, with a channel width-to-length ratio of W/L = 200 µm/50 µm. The device exhibits a maximum hole mobility of 2.4 cm² V⁻¹ s⁻¹ and a threshold voltage of −0.35 V. (c) Schematic cross‑section of the p‑type EGT in the ON state, featuring a P3HT (permeable) semiconductor layer. (d) Quasi‑static transfer characteristics and (e) output characteristics of an n‑type zinc oxide EGT, with W/L = 200 µm/50 µm. The zinc oxide was annealed at 300°C; the device’s electron mobility and threshold voltage are 1.9 cm² V⁻¹ s⁻¹ and 0.50 V, respectively, with a scan rate of 50 mV/s. (f) Schematic cross‑section of the n‑type EGT in the ON state, incorporating a zinc oxide (non‑permeable) semiconductor layer.
Figure 3. (a) Quasi‑static output voltage and signal gain (dV_out/dV_in) versus input voltage for a complementary EGT inverter (W/L = 500 µm / 1 µm), with a supply voltage ranging from 1 to 2 V. The inverter achieves rail‑to‑rail output swing, with a maximum gain of 18. The voltage sweep rate is 50 mV/s. Inset: Circuit diagram of the complementary inverter. (b) Current–input voltage characteristics of the complementary inverter at VDD = 2.0 V, with a maximum quiescent current of 1–10 nA. (c) Dynamic response of the EGT inverter to a 1 kHz square‑wave input signal. The inverter employs a PEDOT gate electrode 30 µm wide (suitable for both p‑type and n‑type ETGs), with source and drain electrodes each 15 µm wide, resulting in a 30 µm overlap region among the gate, source, and drain.
Figure 4. (a) Photograph of a five-stage ring oscillator fabricated on an SiO₂/Si substrate. (b) Circuit diagram of the ring oscillator with a buffer stage. (c) Output waveform of the five-stage ring oscillator at a supply voltage of 2 V and an oscillation frequency of 2.2 kHz. The W/L ratios of the P‑type and N‑type ETG transistors are 50 µm/1 µm, respectively. (d) Dependence of the ring oscillator’s frequency and interstage delay on channel width. (e–f) Variation of the oscillation frequency with channel length for two different channel widths (100 µm and 500 µm); the fitted lines represent the relationship log f vs −n·log L, where −n is the slope of the straight line.
Figure 5. Operational stability of printed EGT circuits. (a) Dynamic response curves of a complementary inverter (W/L = 500 µm/5 µm) after 22 hours of continuous operation, measured under VDD = 1.5 V and f = 1 kHz. Black dots indicate the input voltage. The p-type P3HT EGT employs a printed PEDOT:PSS gate, while the n-type zinc oxide EGT uses a printed Ag gate. (b) Output characteristic curves of a five-stage ring oscillator (W/L = 500 µm/1 µm) after 1 hour of continuous operation in an N₂ environment at VDD = 1.5 V.
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