I. Core Research Summary

• All-printed low-voltage complementary transistor system

The ionic‑gel gate capacitance exceeds 1 μF/cm², with all devices exhibiting threshold voltages below 2 V. The highest hole mobility in p‑type devices reaches 1.73 cm²/V·s, while the highest electron mobility in n‑type devices is 1.48 cm²/V·s. The on/off ratio remains stable at over 10⁴, enabling the construction of a fully printed inverter.

• Quantitative comparison of the performance of four types of electrodes, identifying the optimal selection.

Silver nanoelectrodes exhibit the best overall performance: after sintering at 200°C, their sheet resistance drops to as low as 4.6 Ω/□, with balanced p‑ and n‑type carrier injection and leading mobilities in both cases; PEDOT is low-cost but suffers from poor n‑type electron injection; ITO offers excellent optical transparency and is well suited for display applications, yet requires high‑temperature processing at 500°C; RGO provides tunable threshold voltages but has relatively weak electrical conductivity.

• The carrier injection mechanism is clearly distinguished.

P-type P3HT organic semiconductors exhibit excellent energy-band alignment with a wide range of electrode work functions, resulting in threshold voltages that are virtually insensitive to the electrode material. In contrast, n-type ZnO oxides possess a large conduction-band offset, so the electrode work function directly governs the threshold voltage; RGO can achieve an ultra-low n‑type turn-on voltage of 0.3 V.

• Unique Process Advantages of Ionogel Gates

The gate capacitance is independent of film thickness, eliminating the need for stringent ultra-thin‑film control. Aerosol‑based printing can still achieve low‑voltage operation even at thick film layers, significantly broadening the process window and reducing yield losses due to thin‑film defects.

• Single-device compatibility with all types of electronic ink

A single aerosol‑based system can stably atomize conductive inks across four entirely distinct material classes—metals, conductive polymers, transparent oxides, and carbon‑based materials—and allows seamless switching of electrode materials without requiring any changes to the production line hardware.

II. Core Operating Principle of Aerosol Spraying and Its Unique Process Advantages

(1) Complete Layer-by-Layer Printing Process Flow

• SiO₂ silicon substrate preheated to 60°C; aerosol jet printing is used to fabricate Ag/PEDOT/ITO/RGO source and drain electrodes.
• Optimizing electrode conductivity through tailored annealing processes: Ag at 200°C, ITO at 500°C, PEDOT ≤ 200°C, and RGO via hydrazine reduction followed by vacuum annealing.
• Aerosols are used to print P3HT p-type and ZnO n-type semiconductor channels, respectively.
• Atomization deposition of PS-PMMA ionogel as a high-capacitance gate dielectric;
• The top-layer aerosol‑printed PEDOT:PSS common gate was subjected to electrical characterization in a nitrogen atmosphere.

(II) Five Core Process Advantages (Compared with Inkjet, Spin-Coating, and Photolithography Evaporation)

• Universal atomization of multi-system conductive inks

A single system is compatible with metal nanoparticles, conductive polymers, transparent oxides, and carbon-based inks, meeting all requirements for conductive, transparent, flexible, and lightweight electrodes while achieving exceptionally high production-line utilization.

• Maskless digital patterning, rapid iteration of electrode designs

CAD‑based customization of micron‑scale electrode patterns, eliminating the need for photolithography and metal masks; rapid prototyping of four electrode types for direct comparison, significantly shortening the material‑selection cycle.

• Non-contact, gentle deposition that protects the underlying semiconductor layer.

The droplets land gently, avoiding erosion or dissolution of the printed organic/oxide channels, and resulting in fewer interfacial defects in multilayer stacks.

• The ionic gel gate process boasts extremely high fault tolerance.

The thickness of conventional printing substrates directly determines the capacitance; in this ionogel, capacitance remains stable across the 1–10 μm range, and variations in aerosol‑printing thickness do not affect low‑voltage switching, leading to a significant improvement in production yield.

• Suitable for flexible substrates in medium- and low-temperature processes.

The annealing temperature for silver, PEDOT, and RGO electrodes is ≤200°C, allowing direct transfer onto a PI flexible substrate; only ITO is limited by high-temperature processing, enabling separate process routes to accommodate both rigid and flexible manufacturing lines.

III. Five Key Technological Innovations

Innovation 1: An innovative system for establishing a performance database of multi-electrode printed transistors

Innovation 2 Reveals the Differential Implantation Rules of p- and n-type Semiconductors

Innovative 3‑ion gel: a thickness‑independent high‑capacitance mechanism for practical applications

Innovative four‑step gradient electrode annealing process matching scheme

Innovative integrated manufacturing of a fully complementary circuit in a single device.

IV. Existing Process Challenges and Corresponding Solutions for Overcoming Them

Challenge 1: In PEDOT electrodes, n-type Zn-based transistors exhibit poor electron injection and a sharp drop in carrier mobility.

Challenge 2: ITO ink requires high-temperature annealing at 500°C, making it unsuitable for flexible plastic substrates.

Challenge 3: The RGO film exhibits a relatively high sheet resistance, resulting in low device on-state current.

Challenge 4: Thick ionogel layers can easily lead to device hysteresis and signal drift.

Challenge 5: Frequent ink switching can lead to cross-contamination in the tubing, resulting in electrical leakage defects.

V. Future Diversified Industrial Application Scenarios

1. Low-cost flexible CMOS logic circuits

2. Transparent Flexible Touch and Display Devices

3. Wearable Physiological Sensor Array

4. Miniature Low-Power IoT Node

5. Aerospace Lightweight Carbon-Based Measurement and Control Circuitry

Figure 1. (a) Additive manufacturing process for fabricating EGTs on a SiO₂/Si substrate via aerosol jet printing. In this study, a top-gate (PEDOT:PSS) and bottom-contact EGT architecture is employed, with a width-to-thickness ratio of 1000 μm/50 μm. (b) Optical microscopy images of EGTs printed using different S‑D electrode materials—silver, PEDOT:PSS, ITO, and annealed RGO. (c, d) Cross-sectional structures and operating principles of p-type EGTs incorporating permeable polymer semiconductors and n-type EGTs incorporating impermeable metal‑oxide semiconductors.

Figure 2. Silver electrodes. (a) Optical microscopy image of a printed silver pattern on a silicon dioxide–silicon substrate. The thickness and minimum width of the printed traces are approximately 500 nm and 50 µm, respectively. (b) Plot of sheet resistance of the printed silver film as a function of sintering temperature. Each sample was sintered in air for 1 hour. The dashed line indicates a visual reference. (c) Scanning electron microscope images of the printed silver sample in the as‑printed state (left) and after sintering at 200 °C (right). Scale bar: 1 µm. (d, e) Quasi‑static transfer and output characteristics of a printed p‑type EGT device employing a P3HT semiconductor and silver source–drain electrodes, with a voltage sweep rate of 50 mV/s. (f, g) Quasi‑static electrical characteristics of an n‑type EGT device using a zinc oxide semiconductor and silver source–drain electrodes. The printed silver electrodes were sintered at 200 °C.

Figure 3. PEDOT electrodes. (a) Optical microscopy image of a PEDOT:PSS pattern printed on a SiO₂/Si substrate. The printed lines have a thickness of 750 nm and a minimum width of 40 μm. (b) Sheet resistance and (c) optical microscopy images of the printed PEDOT:PSS film as functions of annealing temperature. The samples were annealed in air for 1 hour. (d, e) Transfer and output characteristics of a printed p-type EGT device employing a PEDOT:PSS S‑D electrode under quasi‑static conditions (voltage scan rate: 50 mV/s). The effective hole mobility was calculated to be 1.6 cm²·V⁻¹·s⁻¹. (f, g) Quasi‑static electrical performance of an n‑type EGT device using a PEDOT:PSS electrode. To prevent degradation of the PEDOT:PSS material, the zinc oxide thin film was annealed at 200 °C for 1 hour; the device exhibited an effective electron mobility of 0.2 cm²·V⁻¹·s⁻¹.

Figure 4. ITO electrodes. (a) Optical microscopy image of an ITO pattern printed on a SiO₂/Si substrate. The printed lines have a thickness of 500 nm and a minimum width of 50 μm. (b) Variation of the sheet resistance of the ITO sample with annealing temperature. The sample annealed at 500°C exhibits the lowest RS value, equal to 2250 Ω/sq. (c) XRD spectra of the ITO thin film on a TiC/Si substrate as a function of annealing temperature. (d, e) Quasi‑static transfer and output characteristics of a printed p‑type electron transport layer (EGT) using an ITO S‑D electrode, with a voltage scan rate of 50 mV/s. The effective hole mobility is 1.1 cm²·V⁻¹·s⁻¹. (f, g) Quasi‑static electrical characteristics of an n‑type electron transport layer (EGT) employing an ITO electrode. The effective electron mobility and threshold voltage (Vth) are 0.8 cm²·V⁻¹·s⁻¹ and 1.05 V, respectively. The ITO was annealed at 500°C.

Figure 5. RGO electrodes. (a) Optical microscopy image of an RGO pattern printed on a SiO₂/Si substrate. The printed lines have a thickness of 300 nm and a minimum width of 40 μm. (b) Sheet resistance variations for freshly printed GO, RGO, and annealed RGO samples. The annealed RGO sample exhibits the lowest sheet resistance, at 6,500 Ω/sq. (c) XPS C 1s spectra of three GO samples. During reduction and annealing, the intensity ratio of I_C−O to I_C−C decreases from 0.34 to 0.05. (d, e) Quasi‑static transfer and output characteristics of a printed p‑type EGT device using an annealed RGO electrode, with a voltage scan rate of 50 mV/s. (f, g) Quasi‑static electrical performance of an n‑type EGT device employing an annealed RGO electrode. The effective mobilities of the p‑type and n‑type EGT devices reach 0.4 cm²·V⁻¹·s⁻¹ and 0.6 cm²·V⁻¹·s⁻¹, respectively.

Figure 6. (a) Correlation plot between the electrode work function (WF) and the threshold voltage of p‑type and n‑type electron mobility‑gradient transistors (EGTs). (b) Dependence of the effective mobility in p‑type and n‑type EGTs on the sheet resistance of the electrode material. (c, d) Schematic band diagrams at the electrode/p‑type semiconductor (P3HT) and electrode/n‑type semiconductor (zinc oxide) interfaces, respectively. EF and Φ denote the Fermi level and the charge injection barrier, respectively; for simplicity, the Mott–Schottky limit—i.e., vacuum‑level alignment—is assumed. The figure also shows the work functions of RGO and PEDOT:PSS, which exhibit the lowest (4.7 eV) and highest (5.35 eV) values, respectively.