I. Abstract of the Paper’s Core Research

This study uses a 6‑inch SOI accelerometer wafer as the substrate, employing DRIE deep silicon etching to simultaneously fabricate interconnect trenches. A pneumatic aerosol jet deposition process is used to deposit a diluted aluminum nanoink, followed by high‑temperature annealing to form an ohmic conductive bridge between the p‑type device layer and the p‑type supporting silicon wafer. The effects of printing duration, nozzle motion, and trench geometry on via resistance and filling uniformity are systematically investigated. The key findings are as follows:

Integrated Groove Synchronous Fabrication Process

During the release etching stage of MEMS movable structures, 60×240 μm rectangular/oblong interconnect trenches are simultaneously etched, eliminating the need for additional photolithographic via opening. This bypasses complex wafer‑level processes such as CMP planarization and multi‑layer metal deposition, reducing the overall process time by more than 50%.

Precise Groove Filling with Aerosol Aluminum Ink

Commercial high-viscosity aluminum ink, diluted with ethylene glycol, is suitable for atomization; the amount of aluminum filler is controlled by adjusting the jetting duration. When the jetting time is ≥5 seconds, the corners at the bottom of the trenches are uniformly filled, and the average resistance of a single via remains stably below 4 Ω, with an I–V curve exhibiting typical ohmic behavior.

Quantitative Matching Patterns of Printing Parameters

With fixed sheath gas and carrier gas flow rates, we compared two printing modes: fixed-point jetting and 90-μm path‑moving printing. During long‑duration jetting (5–10 s), the grooves were fully covered; in contrast, during short‑duration jetting (1.5–2.5 s), material accumulated only at the center, resulting in large fluctuations in contact resistance. No significant differences were observed in the electrical properties between rectangular and elongated‑oval grooves.

800°C high-temperature, low-resistance sintering system

800°C nitrogen‑protected annealing promotes aluminum–silicon interdiffusion, yielding a contact resistivity as low as 20 mΩ·cm²—significantly superior to that achieved with the 550°C low‑temperature process. Test pads with a width of 100 μm enable precise four‑probe characterization of the through‑via electrical properties.

Maskless wafer-level batch molding

A single wafer can be processed in batch to form 200 sets of interconnect trenches, with aerosol‑based digital‑path deposition enabling on‑demand, site‑specific deposition that fills only the trench interiors with metal. This approach results in aluminum material consumption far lower than that of electroplating or sputtering processes that achieve full‑area coverage.

II. SOI MEMS Complete Process Flow for Aerosol Through-Hole Technology

SOI wafer pre-processing: 50 μm device layer, 2 μm buried oxide layer, and a 625 μm support wafer; DRIE‑etched accelerometer structure with interconnect trenches; HF vapor‑phase release of the movable microstructure.

Aluminum ink formulation: Commercial Al-IS1000 aluminum nano‑ink is diluted with ethylene glycol in proportion to reduce viscosity and optimize compatibility with pneumatic atomization.

The Optomec Aerosol Jet 300 CE system performs wafer-level printing with the substrate maintained at a constant temperature of 90°C, and experiments were conducted using multiple jet‑on durations of 1.5, 2.5, 5, 7, and 10 seconds.

Two printing modes: Center-point spraying in the groove, with reciprocating spray movement at 90 mm;

Post-processing: The sample was dried in a 100°C oven for 30 minutes to remove the solvent, followed by high-temperature sintering in a tube furnace at 800°C to form a silicon–aluminum ohmic contact.

Characterization: Optical microscopy was used to observe the filling morphology, SEM cross-sectional analysis was performed to assess the uniformity of trench coverage, and a Keithley source‑measure unit with a four‑probe configuration was employed to measure the series resistance of the vias.

III. Five Core Process Advantages of Aerosol-Through‑Silicon Via Fabrication (vs. Electroplated TSVs and Photolithographic Metallization)

Significantly streamline wafer fabrication processes.

Trenches are formed simultaneously with MEMS release etching, eliminating the need for multiple lithography steps such as via opening, dielectric deposition, and CMP polishing, thereby reducing wafer stress and minimizing microstructure adhesion‑related scrap.

Site-specific selective deposition, reducing precious-metal consumable usage.

Only the trench interiors are filled with aluminum, and the wafer surface remains free of extensive sputter deposition; aluminum ink consumption is significantly lower than that of vacuum deposition.

Maskless digital direct writing, low-cost for small-batch R&D.

No custom metallized photomask is required; the trench‑printing area is defined directly in CAD, and new product iterations do not necessitate retooling.

Compatible with released suspended MEMS Structure

After the release of the device’s movable structure, interconnects can still be printed without damaging the fragile microcantilevers or the sensing mass, and it is compatible with modifications to mature SOI fabrication lines.

High-temperature Al–Si contact with stable ohmic characteristics.

Sintering at 800°C promotes interfacial interdiffusion, resulting in extremely low contact resistance and meeting the requirements of high‑signal readout circuits for MEMS.

IV. Five Core Technological Innovations of This Study

Innovation 1: Integrated Synchronous Design of MEMS Etching and Interconnect Trenches

The conductive trenches and sensing structures are fabricated in a single DRIE etching step, completely eliminating the conventional separate photolithography process for defining openings.

Innovation 2: Quantitative Database of Aerosol Groove-Filling Parameters

A correlation is established between jetting duration, printing motion patterns, and via resistance; jetting for 5 seconds or longer enables uniform, low‑resistance interconnections, and a standard production‑scale process window is defined.

Innovative High-Temperature Aluminum-Based Through-Silicon-Via Ohmic Contact System

A p‑p silicon low‑resistance conductive bridge is realized through aluminum–silicon eutectic interdiffusion, overcoming the limitation of inkjet‑deposited gold inks, which cannot form heavily doped silicon ohmic contacts.

Innovative Four-Wafer-Level Large-Area Aerosol Mass-Production Solution

A 6-inch wafer can be fully processed in a single run, completing the filling of hundreds of through-holes and enabling seamless integration into MEMS pilot‑scale and small‑volume production lines.

Innovative 5‑Release Post‑Processing Microstructure‑Based Nondestructive Additive Interconnection Process

Non-contact droplet deposition, with no mechanical stress, ensures that the released suspended accelerometer structure will not fracture or experience adhesion.

V. Current Industry Challenges and Corresponding Solutions

Challenge 1: Traditional TSV processes involve numerous electroplating and photolithography steps; repeated lithography introduces stress into the wafer, leading to easy adhesion of microstructures.

✅ Grooves are etched in sync with MEMS, followed by a single aerosol‑filling and sintering step, significantly reducing high‑temperature and lithography processes.

Challenge 2: Vacuum sputtering for full‑surface aluminum coating results in significant waste of metal material and high costs.

✅ Aerosol-based localized printing deposits aluminum exclusively within the grooves, significantly reducing nano‑aluminum ink consumption.

Challenge 3: Inkjet‑printed gold ink struggles to form low‑resistance ohmic contacts on heavily doped p‑type silicon.

✅ Aluminum nano‑ink undergoes high‑temperature sintering to form a silicon–aluminum alloy, significantly reducing interfacial contact resistance.

Challenge 4: Insufficient spray time in the groove results in metal deposition only at the center, with no metal at the edges and corners, and significant resistance variation.

✅ Standardized ≥5s jetting process, or mobile scanning and printing, ensures full coverage around the groove perimeter.

Challenge 5: Conventional interconnect processes must be completed before release, which can easily damage the unformed microstructures.

✅This scheme can be printed after the MEMS structure has been fully released, ensuring that the suspended structures are unaffected by mechanical or thermal shocks.

VI. Future Diversified Industrial Application Scenarios

1 Consumer-grade SOI accelerometers and gyroscopes

Mobile phones and smart wristbands incorporate miniature MEMS sensor chips, streamlining the back-end-of-line interconnect process and reducing chip manufacturing costs.

2 In-vehicle high-precision pressure/inertial sensors

High-temperature‑stable aluminum‑silicon through‑holes exhibit no contact resistance drift under wide‑temperature automotive operating conditions, thereby enhancing sensing accuracy.

3 Medical Micro‑MEMS Minimally Invasive Detection Chip

A miniature silicon micro-sensor array, fabricated without stress to prevent microstructural failure, is compatible with minimally invasive in vivo monitoring devices.

4 MEMS Chip Laboratory R&D Platform

Rapidly iterate on interconnect schemes with varying trench dimensions, eliminating the need for custom lithography masks and shortening the chip verification cycle.

5 Hybrid Silicon-Based Printed Electronics Heterogeneous Integration

Silicon MEMS and flexible printed circuits are interconnected at the wafer level, enabling a low-cost packaging solution for heterogeneous systems.

Image and Text Guide

Figure 1. Schematic diagram of the aerosol jet printing (AJP)–based approach for fabricating SOI MEMS electrical contacts, along with the four‑probe measurement configuration.

Table 1. Printing parameters for all section metallized oblong/rectangular chambers (TP = substrate temperature, Sh = sheath gas atomization flow rate, Atom = atomization flow rate, Exh = exhaust flow rate)

Figure 2. Top-view optical micrograph of the metallized oblong cavity after sintering (sections 3 and 6).

Figure 3. (a) Four-probe via resistance measurements for sections 1–10, including 95% confidence intervals; (b) Resistance as a function of printing time.

Figure 4. SEM cross-sectional images of unmetallized and partially metallized frames (scale bar: 10 μm)