“Nano Lett.”: Aerosol-Jet-Printed Low-Voltage Electrolyte-Gated Carbon Nanotube Ring Oscillator with Delay Below 5 Microseconds
Product Introduction
Equipment Parameters
I. Abstract of the Paper’s Core Research
- Low-Voltage Ultra-High-Speed Circuit Performance
The supply voltage is ≤3 V; the optimal device exhibits an oscillation frequency of 22 kHz at 2 V, with a single-stage propagation delay as low as 1.2 μs—representing an order-of-magnitude improvement in speed compared to contemporary printed circuits. Both electron and hole mobilities in the transistors reach 20 cm²/V·s, and the on/off current ratio attains a maximum value of 10⁵.
- Bipolar Electrolyte Gate-Control Mechanism
The ionic gel interface exhibits an ultrahigh double-layer capacitance (≈1 μF/cm²), while positive and negative gate voltages independently modulate hole and electron transport, enabling p‑ and n‑type conduction in a single carbon nanotube transistor and simplifying complementary circuit design.
- The governing principles of circuit speed have been fully elucidated.
Transistor channel length and the ionic conductivity of the ion gel are the two primary limiting factors: delay increases quadratically with channel length and decreases inversely with ionic conductivity; the total RC delay is determined jointly by the channel resistance, the gate resistance, and the gel resistance.
- Clear Performance Optimization Roadmap
By simultaneously shortening the channel, enhancing gel‑ion conductivity, thinning the dielectric, and employing a highly conductive gate electrode, it is theoretically possible to realize printed logic circuits operating at ultra‑high frequencies of 1 MHz.
- The aerosol multilayer-compatible process is well-established.
Three types of inks—carbon nanotube, ionic liquid gel, and conductive polymer—exhibit vastly different material properties and can be continuously atomized and deposited on a single piece of equipment, enabling multilayer fabrication in ambient air without the need for vacuum or high‑temperature processing.
II. Working Principle of Aerosol Spraying & Unique Process Advantages
(1) Complete Layered Aerosol Printing Process
- A 2-μm-wide Au source–drain electrode was fabricated via lithography on a silicon substrate, significantly reducing parasitic capacitance.
- Aerosol‑atomized, high‑purity semiconductor carbon nanotube ink enables direct‑write fabrication of conductive channels with adjustable widths ranging from 10 to 200 μm.
- Print [EMI][TCB] ionic liquid + triblock copolymer composite ionogel gate dielectric;
- Aerosol printing of PEDOT:PSS conductive polymer as the top gate;
- Solvents are removed by low-temperature drying, and electrical measurements are performed under vacuum.
(II) Five Core Process Advantages (Compared with Inkjet, Spin Coating, and Vacuum Evaporation)
- Universal atomization of multi‑category nano inks
A single set of equipment can stably produce carbon nanodispersions, ionic liquid gels, and conductive polymer pastes without requiring replacement of the atomization chamber, thereby simplifying the equipment configuration of flexible circuit production lines.
- High-precision direct writing of narrow-line patterns
Aerosol printing can achieve a minimum feature size of several micrometers, enabling the fabrication of short-channel transistors that reduce RC delay at the source and thereby enable high-speed logic.
- Non-contact, gentle deposition that protects the underlying electrode.
The gentle deposition of mist droplets avoids washing away or damaging the photolithographically defined gold electrodes, while preserving the integrity of the narrow source–drain structure and effectively reducing the gate–drain parasitic capacitance.
- Large-area continuous roll-to-roll compatibility
Continuous printing in ambient air, with no need for a sealed glovebox, making it suitable for the large-scale fabrication of oscillator arrays on flexible PI and PET films.
- Significantly improved consumable utilization rate
On-demand localized printing of the dielectric and gate electrodes eliminates the need for full‑wafer spin coating, significantly reducing the waste of costly carbon nanomaterials and ionic liquids.
III. Five Core Technological Innovations of This Study
Innovation 1: Ion-gel ultra-high capacitance gate dielectric–matched aerosol process
Innovation 2: Short-Channel Narrow-Electrode Device Architecture
Innovation 3: A Comprehensive Speed Quantification and Regulation Model
Innovation 4: Aerosol‑Based All‑Functional Layer Integrated Bipolar Transistor
Innovative 5-V Low-Voltage High-Speed Printed Circuit Verification Closed Loop
IV. Existing Process Challenges and Corresponding Solutions
Challenge 1: Traditional printing media have low capacitance, requiring a high-voltage supply of 10 V or higher.
Challenge 2: In long-gate-channel transistors, the RC delay is extremely large, resulting in very low circuit operating frequencies.
Challenge 3: The conventional grid electrode has poor conductivity, increasing the total circuit resistance.
Challenge 4: The ion conductivity of ionic gels is limited, which restricts the switching speed.
Challenge 5: Multi-layer printing is prone to interlayer miscibility, which increases leakage current and parasitic parameters.
V. Future Diversified Industrial Application Scenarios
1. Flexible OLED / E-paper drive backplane
2. Passive IoT High-Frequency Sensing Tag
3. Wearable Physiological Sensing Circuitry
4. Large-area flexible touch panel
5. Lightweight Aerospace Flexible TT&C Chip
Figure 1. A fast, printed five-stage carbon nanotube ring oscillator employing a high‑capacitance ionic gel gate dielectric. (a) Output waveform of the carbon nanotube ring oscillator at a frequency of 22 kHz and an interstage delay of 4.5 μs (VDD = 2 V); the thin‑film transistor (TFT) has a channel length of 10 μm, a channel width of 100 μm, and an ionic gel thickness of 1.2 μm. (b) Dependence of the oscillator’s frequency and interstage delay on the supply voltage VDD. (c) Circuit diagram of the ring oscillator with a buffer stage. (d) Photograph of the gold contact pads in the ring oscillator prior to printing. (e) Photographs of the gold source, drain, and gate contact pads of a single TFT before printing; the source and drain electrodes each have a width of 2 μm. (f) Schematic of a single TFT after all layers—including the semiconducting carbon nanotube network, the ionic gel dielectric layer, and the PEDOT:PSS gate electrode—have been printed.
Figure 2. Performance of ion‑gel‑gated bipolar carbon nanotube thin‑film transistors (CNT TFTs). (a) Transfer characteristics of a typical CNT TFT, shown in both linear and semi‑log scales. The channel dimensions are 5 μm × 100 μm, with VD = −0.1 V and a gate voltage sweep rate of 75 mV/s; the average electron and hole mobilities are both 20 cm²/(V·s), and the on/off current ratio is 10⁵. (b) Output characteristics of the CNT TFT, with n‑channel transport (blue curve) and p‑channel transport (red curve) plotted separately.
Figure 3. Performance of the ion‑gel‑gated carbon nanotube inverter. (a) Output characteristics of the carbon nanotube inverter under different VDD biases (1–2 V). The inset shows a schematic of the inverter structure, consisting of two identical bipolar thin‑film transistors with channel dimensions of 5 μm × 100 μm; at 2 V, the inverter gain is 20. (b) Dynamic response of the carbon nanotube inverter to a 10 kHz input signal (VDD = 1.8 V, L = 5 μm). The inverter output signal (red) is perfectly synchronized with the input signal (blue), and both the rising and falling edges of the input signal are ramped over 5% of the period.
Figure 4. Parameters affecting the frequency and switching time of carbon nanotube inverters. (a) Circuit diagram and equivalent circuit of two cascaded inverter stages. (b) Inverter delay time as a function of TFT channel length (W = 100 μm). [EMI][TCB] The ionogel has a thickness of 1.2 μm and an ionic conductivity of 13 mS/cm. The fitted curve (red dashed line) indicates that tdelay ∼ L + L². (c) Inverter delay time as a function of ionic conductivity in the ionogel (L = 5 μm, ionogel thickness = 2.3 ± 0.3 μm). The fitted curve (dashed line) shows that tdelay ∼ σ⁻¹.
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